How to design a microcircuit. Own processor (almost)

How to develop your own microcircuit. I asked this question when I wanted to create my own processor. I went to google and found nothing good. The answers are mostly twoึ‰ "You won't make your own processor, because it's too difficult" and "Hammer and assemble a computer from components."





, . Verilog FPGA. , 3 , , FPGA. .





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. . 130 .





, GDS-II , .





ึ‰ . 10000 , . Multi project wafer service [ https://en.wikipedia.org/wiki/Multi-project_wafer_service ].





GDS-II . , , .





GDS-II Process Development Kit

SHA3. SHA3 , Caravel Harness. SKY130 . Caravel Harness .





SHA3 โ€‹โ€‹integrated circuit based on SKY130 technology, https://efabless.com/projects/4
SHA3 SKY130, https://efabless.com/projects/4

Process Development Kit ึ‰





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  • SPICE.





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  • , GDS-II .





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  • Design Rule Check





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    • Primitive Extraction rules . GDS-II (netlist). netlist , netlist .





    • Layout versus Schematic check , GDS-II netlist. , .





, SKY130 (130) . , , .





Standard Cell Library. , . .





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- - MOSFET. - NMOS PMOS.





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N-MOS transistor.  You can understand the type by the type of two contacts Source and Drain
N-MOS. Source Drain

ึ‰ . , N+ P Substrate. Vgs < Vth NMOS . Vgs >= Vth, Vds < Vgs - Vth . Vgs >= Vth Vds > Vgs - Vth . PMOS, NMOS , .





ึ‰ PMOS () NMOS ()





Inverter circuit in Magic from speedrunner inverters on YouTube
Magic

. Ubuntu ึ‰ https://github.com/efabless/openlane#quick-start. ~/openlane_exp/





ึ‰ https://github.com/armleo/sky130_ubuntu_setup/blob/main/install_tools.sh





https://inst.eecs.berkeley.edu/~cs250/fa20/labs/lab1/









  • OpenLANE, . . skywater PDK + . .





    • Yosys. . ึ‰ Claire Wolf. Verilog gate-level , . Design Compiler Synopsys





    • , gate-level GDS-II.





  • skywater-pdk. PDK skywater 130nm. , -





  • ngspice, spice. , HSPICE Synopsys.





  • xschem, . CustomCompiler Synopsys





  • klayout, GDS-II. CustomCompiler Synopsys





  • Magic, DRC, . . IC Validator Synopsys





  • Netgen, LVS . IC Validator Synopsys





  • OpenRAM. . Memory Compiler Synopsys. , - NDA. .





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cd ~/openlane_exp/openlane
docker run -it --rm -v /home/armleo/openlane_exp/openlane:/openLANE_flow \
-v /home/armleo/openlane_exp/openlane/pdks:/home/armleo/openlane_exp/openlane/pdks \
-e PDK_ROOT=/home/armleo/openlane_exp/openlane/pdks \
-e PDKPATH=/home/armleo/openlane_exp/openlane/pdks/sky130A/libs.tech/magic \
-v /tmp/.X11-unix:/tmp/.X11-unix \
-v /home/armleo/openlane_exp:/home/armleo/openlane_exp \
-e DISPLAY=unix$DISPLAY \
-u 1000:1001 efabless/openlane:v0.12

klayout /home/armleo/openlane_exp/openlane/pdks/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/inv/sky130_fd_sc_hd__inv_1.gd
      
      



X11 .





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  • Manage Technologies









  • /home/armleo/openlane_exp/openlane/pdks/sky130A/libs.tech/klayout/sky130A.lyt









  • sky130A





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Inverter

, ึ‰D.





, . SOURCE BULK PMOS VDD . VGND , SOURCE BULK NMOS .





GATE A LI1.





Y LI1.





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  • NMOS , , PMOS . . NMOS , , , PMOS .





  • NMOS , , PMOS VDD Y. NMOS , , . .





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, 4 ึ‰ DRAIN, SOURCE, GATE, BULK.





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  • (NAND, NOR), LVS, DRC, PEX .





  • , (Sequential components) - Latch, Flip-flop





  • After that, we will analyze how to compile our Verilog in GDS.





  • Let's understand how to assemble our schema in Caravel








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