The methodology used currently for VLSI design using hardware description languages has generally recognized shortcomings, namely:
Developing complex VLSIs requires hundreds of skilled engineers, several years of work, and billions of dollars in costs.
Up to half of the development time is spent on finding and eliminating errors in the software model of the microprocessor being designed.
Substantial labor costs are required to achieve high performance in terms of area, productivity, energy efficiency.
Domestic and foreign ideas, solutions to VLSI design problems, lie within the generally accepted paradigm, the use of programming languages to describe the designed equipment. All of these solutions are used in currently implemented DARPA programs .
DARPA programs
Within the framework of the Electronics Resurgence Initiative announced by DARPA, the task was set to overcome the problems of the applied methodology for designing microprocessor systems. For this purpose, the following subroutines are implemented:
CRAFT - involves the creation of high-level VLSI synthesis tools;
IDEA - aims to create an automatic generator of SoC layout, multichip microcircuits, printed circuit boards;
POSH - aims to create a viable open source hardware design and verification ecosystem that will cost-effectively design ultra-complex SoCs.
In case of successful execution of these programs, the results obtained should be combined in advanced CAD systems. It is expected to achieve a 10-fold increase in development speed over manual creation of RTL code. In addition, the goal is to fundamentally change the practice of developing microprocessor devices. The ultimate goal of transforming engineering practice is described as follows :
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